]> Devi Nivas Git - cs3210-lab0.git/commit
projects / cs3210-lab0.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 355073e) | patch
Apparently the initial interrupt count lapic[TICR]
authorrsc <rsc>
Wed, 26 Sep 2007 20:34:12 +0000 (20:34 +0000)
committerrsc <rsc>
Wed, 26 Sep 2007 20:34:12 +0000 (20:34 +0000)
commitd5596cd61dd588781cde4b647075e39f07608c0a
tree406879201f72a3c9ef292e8ce2eb1cddc8131d79tree | snapshot
parent355073ea9e7528e45143efaa9631efcf159a2b68commit | diff
Apparently the initial interrupt count lapic[TICR]
must be set *after* initializing the lapic[TIMER] vector.

Doing this, we now get clock interrupts on cpu 1.
(No idea why we always got them on cpu 0.)

Don't write to TCCR - it is read-only.
defs.h diff | blob | history
lapic.c diff | blob | history
CS3210 lab 0